1. Field of the Invention
The present invention generally relates to a liquid crystal display, and more particularly to control the same.
2. Description of the Related Art
FIG. 1 is a diagram showing a conventional liquid crystal display apparatus.
As shown in this diagram, the conventional liquid crystal display apparatus includes a liquid crystal panel 1, a gate driver 3, a driving driver 5, a control signal generating circuit 9, and a plurality of transmission lines 11.
The liquid crystal panel 1 is used to display an image. The gate driver 3 is coupled to the control signal generating circuit 9, which selectively drives gate lines GL arranged in the liquid crystal panel 1.
The driving driver 5 is used to drive source lines SL, which are arranged in the liquid crystal panel 1, so as to cause image display data DATA to be displayed in response to a clock signal CK and a latch pulse signal LP, which are supplied from the transmission lines 11.
The control signal generating circuit 9, which is formed on a substrate 7, receives the clock signal CK, a horizontal synchronizing signal Hsync, a vertical synchronizing signal Vsync and image display data IN-DATA, and outputs the received clock signal CK, the latch pulse signal LP and the image display data DATA.
The transmission lines 11, which are coupled to the control signal generating circuit 9 and are provided on a wiring plate 16, serve to transfer the signal CK, the latch pulse LP and the image display data DATA to the driving driver 5. In this example, the driving driver 5 is connected to three transmission lines 11 provided on the wiring plate 16.
In recent years, the liquid crystal display apparatus has been produced with high density and the liquid crystal panel 1 has been designed to be able to display a large amount of image. In order to support this situation, it is required to transfer the image display data to the liquid crystal panel 1 at a higher rate. For example, the liquid crystal panel 1 with an SXGA size (1280xc3x971024 dots) uses the clock signal CK with an average frequency of 54 MHz.
As the liquid crystal panel 1 has a large scale, the transmission lines 11, which are coupled to the driving driver 5 used to drive the liquid crystal panel 1, become longer.
As the transmission lines 11 become longer, it is more difficult to sufficiently drive stray capacitance caused by capacitance/resistance components of the transmission lines 11. As a result, conventionally, the transmission lines 11 need to be provided with buffers so as to ensure high-speed driving.
Further, the higher the frequency of the clock signal CK becomes, the more electromagnetic interference caused by radiation of unwanted electronic waves are increased.
It is a general object of the present invention to provide a liquid crystal panel and a method of controlling the liquid crystal panel, in which the above disadvantages can be overcome.
The above object and other objects of the present invention are achieved by a circuit for driving a liquid crystal panel driving comprising:
a restoring unit restoring a first clock signal, in response to which a liquid crystal panel is to be driven, based on second clock signals each having a frequency lower than that of said first clock signal; and
a driving unit connected to said restoring unit so as to drive said liquid crystal panel in response to said first clock signal restored by said restoring unit.
A better understanding of the features and advantages of the present invention will be obtained by reference to the following detailed description of the invention and accompanying drawings which set forth an illustrative embodiment in which the principles of the invention are utilized.